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Apple to Implement TSMC’s New Assembly Technology in Upcoming A20 Chip
According to technology analyst Ming-Chi Kuo, Apple plans to adopt an innovative assembly technology from TSMC for its forthcoming A20 chip, enhancing the efficiency of the onboard RAM. The technology, known as Wafer-Level Multi-Chip Module (WMCM), strategically positions the RAM on top of the chip rather than at the side, connected via a silicon interposer. This configuration is expected to improve performance, lower power consumption, reduce heat generation, and compact the SoC’s overall size. Kuo’s statement corroborates earlier reports from another analyst, Jeff Pu, who shared similar insights in June.
Anticipated Enhancements in iPhone 18 with A20 Chip in 2026
Slated for release in the iPhone 18 models by 2026, the A20 chip from Apple will also reportedly be the first to utilize TSMC’s N2 fabrication process, which boasts a precision of 2 nanometers. This marks a significant leap in energy efficiency compared to the current chips that are manufactured using a 3-nanometer equivalent process. TSMC estimates that its N2 process can deliver a 25% to 30% increase in power for the same energy consumption or a 10% to 15% energy saving for the same power output. Additionally, it increases transistor density by 10% to 20%, allowing for more transistors in the same volume. Meanwhile, the upcoming iPhone 17’s advancements with the A19 chip, set to be unveiled next month, are expected to be less dramatic.
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Ethan Rivers focuses on Android smartphones, emerging mobile platforms, and operating systems. With a critical yet fair perspective, he evaluates devices on performance, design, and ecosystem compatibility.